发明名称 High performance cost optimized memory
摘要 A memory device includes an interconnect with mask pins and a memory core for storing data. A memory interface circuit is connected between the interconnect and the memory core. The memory interface circuit selectively processes write mask data from the mask pins or precharge instruction signals from the mask pins.
申请公布号 US2002178324(A1) 申请公布日期 2002.11.28
申请号 US20020128167 申请日期 2002.04.22
申请人 发明人 BARTH RICHARD M.;WARE FREDERICK A.;STARK DONALD C.;HAMPEL CRAIG E.;DAVIS PAUL G.;ABHYANKAR ABHIJIT M.;GASBARRO JAMES A.;NGUYEN DAVID
分类号 G11C7/10;G11C7/12;G11C11/4096;(IPC1-7):G06F12/16 主分类号 G11C7/10
代理机构 代理人
主权项
地址