发明名称 Integrated EJTAG external bus interface
摘要 An apparatus comprising a processor and an interface. The processor may be configured to support system-on-chip debugging. The interface circuit may be coupled to the processor and configured to interface with an external bus. Reading and writing commands of the processor may be integrated with the system-on-chip debugging.
申请公布号 US6484273(B1) 申请公布日期 2002.11.19
申请号 US20000725543 申请日期 2000.11.29
申请人 LSI LOGIC CORPORATION 发明人 CHANG PAUL K.
分类号 G06F11/27;G06F11/36;(IPC1-7):G06F11/00 主分类号 G06F11/27
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