发明名称 Electronic circuit, test-apparatus assembly, and method for outputting a data item
摘要 Electronic circuits test memory matrices that have address inputs, data outputs and a memory matrix. The memory spaces in the memory matrix can be addressed via the address inputs, and output a data item via the data outputs. The circuit also has an output circuit, which connects to at least one of the address inputs, to the memory matrix, and to the data outputs. The output circuit outputs a data item to different data outputs, depending on its address. This circuit can be operated in an apparatus for testing the function of a memory matrix, with the circuit connecting the test apparatus and a memory matrix to one another such that the outputs of the memory matrix are produced at the data inputs of the circuit, and the data outputs together with the further data output of the circuit are applied to inputs of the test apparatus. The memory matrix has a main cell array and a redundant memory cell area, with the main cell array being tested in the first operating mode, and the redundant memory cell area being tested in the second operating mode.
申请公布号 US6466495(B2) 申请公布日期 2002.10.15
申请号 US20010922476 申请日期 2001.08.03
申请人 INFINEON TECHNOLOGIES AG 发明人 RIEGER MARTIN
分类号 G11C29/00;G11C29/24;(IPC1-7):G11C7/00 主分类号 G11C29/00
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