| 摘要 |
A system and method of implementing a high performance digital bus interface is disclosed. Digital signals present on a plurality of digital bus signal lines are amplitude encoded into a single signal and coupled to a transmission medium. The encoded signal is received and decoded by a complimentary decoder. The amplitude levels are discriminated and converted into digital symbols, each comprising a plurality of bits, which are coupled to a second digital bus. Digital signals are amplitude encoded at levels related by powers of two so that no encoding ambiguity is created. In wide data bus implementations, a plurality of encoder/decoders can be used. In other embodiments, bi-directional bus implementations are taught.
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