RATIOLESS AND NON-INVERTING LOGIC CIRCUIT USING FIELD EFFECT BOOSTING DEVICES

摘要

A non-inverting logic gate using a field effect device which includes a boosting capacitor having a fixed plate connected to an input terminal and its other plate comprising an inverted layer in the substrate region under the fixed plate. The inverted layer is formed in response to an input signal. A clocked terminal is connected to the inverted layer. As a result, the voltage on the fixed plate is boosted by the voltage level on the electrode. The fixed plate is connected to the gate electrode of a field effect transistor having its source electrode connected to the clocked terminal and its drain electrode connected to an output terminal. An isolation field effect transistor is connected between the output terminal and the field effect transistor for isolating the output terminal after it has been set to the voltage level equivalent to the input voltage level. Initially, the output is set to one voltage level which is changed as a function of the input voltage.