| 摘要 |
A first conductive layer of metal silicide, a silicon layer, an insulating layer, and a second conductive layer of metal or metal silicide are deposited in the order named on a surface of a a semiconductor substrate. Thereafter, the second conductive layer and the insulating layer are patterned to expose the silicon layer. The exposed silicon layer and the first conductive layer are patterned, thereby forming an MIM capacitance circuit.
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