| 摘要 |
PURPOSE: A method for forming a bit line contact of a semiconductor device is provided to obtain a desired contact resistance by restraining generation of a void in a bit line contact. CONSTITUTION: An isolation layer(42) is formed on an isolation region of a semiconductor substrate(41). A gate(43) and a source/drain region are formed on a cell region and a peripheral region. The first, the second, and the third spacers(44,45,46) are formed on a side portion of the gate(43). The first interlayer dielectric is deposited thereon. A landing plug is formed on a connection portion between a source/drain for storage node and a bit line by using a self aligned contact process. The second interlayer dielectric is formed between the landing plug and the bit line. A photo-resist pattern layer is formed thereon in order to open the first and the second bit line contact hole formation regions. The first and the second bit line contact holes(54,55) are formed by etching selectively the first and the second interlayer dielectrics. A material layer(53) for forming the fourth spacer is formed on a whole surface of the above structure. The fourth spacer is formed at sides of the first and the second bit line contact holes(54,55). A barrier metal layer(56) and a bit line are formed sequentially thereon.
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