发明名称 |
Method of manufacturing semiconductor device having nonvolatile memory and logic circuit using multi-layered, inorganic mask |
摘要 |
An inorganic film with a double-layers structure is used as an etching mask in an EEPROM area to pattern a double-layers gate, while a thin inorganic film obtained by removing one layer of the double-layers inorganic film by etching is used as an etching mask in a CMOS logic circuit area. Therefore, the gate pattern can be formed with high precision by using a thin etching mask in the CMOS logic circuit area.
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申请公布号 |
US6417086(B1) |
申请公布日期 |
2002.07.09 |
申请号 |
US20000506379 |
申请日期 |
2000.02.18 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
OSARI KANJI |
分类号 |
H01L21/308;H01L21/3213;H01L21/8234;H01L21/8238;H01L21/8239;H01L21/8246;H01L21/8247;H01L27/088;H01L27/105;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L21/320;H01L21/476;H01L21/336 |
主分类号 |
H01L21/308 |
代理机构 |
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代理人 |
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地址 |
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