| 摘要 |
Data arriving from a plurality of channels asynchronously to each other are respectively stored in separate FIFOs (10). A controller (12) monitors the status of the FIFOs (10), retrieves the stored data in a predetermined order, and multiplexes the data, together with timing data indicating the presence or absence of the data, into a serial signal having a frame structure in which time slots are fixedly assigned to the respective channels. On the serial data, the same value appears successively as data, and when the data is valid, the corresponding timing data changes from a 0 to a 1. When the data is invalid, the value of the corresponding timing data does not change.
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