发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device, provided with a built-in test circuit, with which a defective memory cell can be replaced by a redundant memory cell. SOLUTION: After data has been written in a memory cell array according to an internal address signal, in read-out operation, read-out data from each memory cell is compared with expected value data. A row decoder 2142 selects plural memory cells, belonging to the same row of the memory cell array en bloc according to the address signal. A BIST circuit 2002 discriminates carrying out of relieving in a spare memory cell row, rather than in a spare memory cell column, when plural defective memory cells are detected in plural memory cells selected en bloc.
申请公布号 JP2002117697(A) 申请公布日期 2002.04.19
申请号 JP20000307339 申请日期 2000.10.06
申请人 MITSUBISHI ELECTRIC CORP 发明人 OISHI TSUKASA;HIDAKA HIDETO
分类号 G01R31/28;G06F12/16;G11C29/00;G11C29/04;G11C29/12;G11C29/34;G11C29/44;H01L21/822;H01L27/04;(IPC1-7):G11C29/00 主分类号 G01R31/28
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