| 摘要 |
PROBLEM TO BE SOLVED: To speed up the processing of a turbo encoder and to share a memory between an encoder and a decoder. SOLUTION: Buffer registers 109, 110, and 111 are provided before and after two element coding circuits (101 and 102). An amount with a single word of information bit is read from a memory 103 at in one stroke and is accumulated in the buffer register 109. Agitated data (interleaved data) are read from the memory 103, while data is outputted from the buffer register 109. Thus, a parallel supply of data to the two element coding circuits is permitted. Related to the code and information bit outputted from the element-coding circuits 101 and 102, a prescribed amount of them is accumulated in the registers 110 and 111, and a data is cut off at a convenient point and written in a buffer memory 104 for settling unconformity of word width between memories.
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