发明名称 CIRCUIT FOR AND METHOD OF DRIVING A FLAT PANEL DISPLAY IN A SUB FIELD MODE AND A FLAT PANEL DISPLAY WITH SUCH A CIRCUIT
摘要 A flat panel display (PD) comprises a plurality of display elements (C) arranged in a matrix of rows and columns, and electrodes (Sc, D, Su) associated to display elements (C) in a row or a column. The flat panel display (PD) is driven in a sub field mode wherein a field period (Tf) of a received display information (Pi) is divided (1) into consecutive sub field periods (Tsf) having an address period (Tp) preceeding a display period (Ts). Within a field period (Tf), a predetermined order of weight factors (Wf) each associated with a corresponding one of the display periods (Ts) is generated (1). The electrodes (Sc, D, Su) are interconnected in at least two groups (Sce, Sco; Sue, Suo). Drive signals corresponding to the weight factors (Wf) are supplied (2, 3, 4, 5; 2, 3, 4, 5, 6) to each of the at least two groups. Within a same field period (Tf), the predetermined order of weight factors (Wf) is adapted to associate a different order of weight factors (Wf) to the display periods (Ts) of the at least two groups of electrodes (Sce, Sco; Sue, Suo).
申请公布号 US2002027535(A1) 申请公布日期 2002.03.07
申请号 US19980180158 申请日期 1998.11.03
申请人 VAN DIJK ROY 发明人 VAN DIJK ROY
分类号 G09G3/20;G09G3/28;G09G3/288;(IPC1-7):G09G3/28 主分类号 G09G3/20
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