| 摘要 |
The semiconductor integrated circuit device of the present invention is provided with a main memory unit and an auxiliary memory unit which functions as a cache memory, and has a structure which permits bidirectional data transfer via data transfer bus lines which are provided between the main memory unit and the auxiliary memory unit; a data transfer bus line precharge power source circuit is provided which supplies to data transfer bus line, when data is not being transferred, a voltage having a level which is lower than the power source voltage supplied to main memory unit. By means of the present invention, it is possible to efficiently conduct data transfer between a main memory unit and an auxiliary memory unit having different operational voltages, and moreover, it is possible to effectively suppress interior noise which is generated.
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