发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND MANUFACTURE THEREOF
摘要 In a semiconductor integrated circuit device, testing pads (209b) using a conductive layer, such as relocation wiring layers (205) are provided just above or in the neighborhood of terminals like bonding pads (202b) used only for probe inspection at which bump electrodes (208) are not provided. Similar testing pads may be provided even with respect to terminals like bonding pads provided with bump electrodes. A probe test is executed by using these testing pads or under the combined use of under bump metallurgies antecedent to the formation of the bump electrodes together with the testing pads. According to the above, bump electrodes for pads dedicated for probe testing may not be added owing to the use of the testing pads. Further, the use of testing pads provided in the neighborhood of the terminals like the bonding pads and smaller in size than the under bump metallurgies enables a probe test to be executed after a relocation wiring process. <IMAGE>
申请公布号 EP1176637(A1) 申请公布日期 2002.01.30
申请号 EP19990901139 申请日期 1999.01.22
申请人 HITACHI, LTD. 发明人 NISHIMURA, ASAO;SYUKURI, SYOUJI;KITSUKAWA, GOROU;MIYAMOTO, TOSHIO
分类号 G01R31/28;H01L23/58 主分类号 G01R31/28
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