| 摘要 |
PROBLEM TO BE SOLVED: To provide a method which dispenses with a need of executing the chip level EM(electromigration) verification processing at the chip design completion and dispenses with backing to power supply wiring in the case of the occurrence of an error in the chip level EM verification to not only shorten the design period but also improve the design efficiency. SOLUTION: The method includes a required power supply via number calculation step, where the required number of power supply vias connecting to a data path from a power supply trunk line in the upper layer of the data path is preliminarily calculated and stored in a storage means at the design of the data path, and a power supply via check step where the required number of power supply vias is reserved by referring to the required number of power supply vias stored in the storage means to check this required number at the power supply wiring in the chip level.
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