发明名称 BLOCK INTERLEAVER AND DE-INTERLEAVER WITH BUFFER TO REDUCE POWER CONSUMPTION
摘要 <p>A block interleaver is provided using a relatively small register file and a larger random access memory (RAM). In one embodiment, the size of the RAM is larger than the size of the register file by at least one order of magnitude. As a result, the register file consumes significantly less power than the RAM for similar operations. The register file receives a stream of sequential data values and stores the data values in a column order. The data values are then read from the register file in a row order. The data values read from the register file in a row order are then written to the RAM in a row order. The data values are then read from the RAM in a row order, thereby creating an interleaved data stream.</p>
申请公布号 WO2002003598(A2) 申请公布日期 2002.01.10
申请号 US2001021039 申请日期 2001.07.02
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