发明名称 Signal processor with a plurality of kinds of processors and a shared memory accessed through a versatile control means
摘要 A signal processor comprises a plurality of processing circuits for carrying out various kinds of processing which differ from one another; a memory circuit provided commonly for respective processing circuits, and a control circuit for carrying out access control between the respective processing circuits and the memory circuit, characterized in that the control circuit carries out address control in different units in accordance with the respective processing circuits. Alternatively, the address control can reflect the different processing priority of different types of data. The processing circuits may be image data I/O means, audio data processing means, encoding/decoding means, error correction means and encoded data I/O means.
申请公布号 US6330644(B1) 申请公布日期 2001.12.11
申请号 US19950547805 申请日期 1995.10.25
申请人 CANON KABUSHIKI KAISHA 发明人 YAMASHITA SHINICHI;HARUMA KAZUHIKO
分类号 H04N7/26;H04N7/50;H04N7/52;(IPC1-7):G06F13/00;G06F15/00 主分类号 H04N7/26
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