发明名称 |
SEMICONDUCTOR DEVICE |
摘要 |
A semiconductor device in which the area of in effective region is reduced to lower the ON voltage while keeping the latch-up immunity almost comparable to that of conventional IGBTs. The semiconductor device is provided with a semiconductor layer of a first conductivity type, a collector layer of a second conductivity type formed on one side of the semiconductor layer, a base layer of the second conductivity type formed on the other side of the semiconductor layer, and an emitter layer of the first conductivity type formed in the base layer, wherein the emitter layer has a ladder-shaped pattern including two beam portions and rung portions that are provided between the two beam portions. Rung portions are also provided between the ends of the beam portions.
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申请公布号 |
WO0191191(A1) |
申请公布日期 |
2001.11.29 |
申请号 |
WO2000JP03238 |
申请日期 |
2000.05.22 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA;HARUGUCHI, HIDEKI;TOMOMATSU, YOSHIHUMI |
发明人 |
HARUGUCHI, HIDEKI;TOMOMATSU, YOSHIHUMI |
分类号 |
H01L29/06;H01L29/739;(IPC1-7):H01L29/78 |
主分类号 |
H01L29/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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