发明名称
摘要 <p>An ATM cell buffer system for buffering ATM cells in various network nodes forming an ATM network, comprising a congestion control unit for controlling congestion of the ATM cells, and further comprising a control counter for counting the number of ATM cells supplied from the ATM cell buffer, in every predetermined period, for every VC queue, within the congestion control unit 30, the congestion control unit deciding the count value of the counter as the minimum output bandwidth for deciding the number of ATM cells to be stored in the next predetermined period, for every connection.</p>
申请公布号 JP3226096(B2) 申请公布日期 2001.11.05
申请号 JP19990143366 申请日期 1999.05.24
申请人 发明人
分类号 H04Q3/00;H04L12/813;H04L12/815;H04L12/823;H04L12/835;H04L12/863;H04L12/865;(IPC1-7):H04L12/56 主分类号 H04Q3/00
代理机构 代理人
主权项
地址