发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE: To read out data stored in a memory cell at high speed in a semiconductor memory having a memory cell. CONSTITUTION: This device is provided with plural data lines, a sense amplifier, and a dummy data line. The data lines are arranged adjacently one another, and transmit data read out from a memory cell. The sense amplifier receives data, and outputs an amplified signal. The dummy data line is arranged along the outside of a data bus line consisting of data lines. The dummy data line performs voltage variation being same as voltage of the data line at the time of read-out operation of data stored in the memory cell. Therefore. accumulated quantity of electric charges for parasitic capacity formed between the data line and the dummy data line at the time of read-out is the minimum. Consequently, variance of rise time of plural data lines is made small, and a read-out time (access time) is shortened.
申请公布号 KR20010088298(A) 申请公布日期 2001.09.26
申请号 KR20000071794 申请日期 2000.11.30
申请人 FUJITSU LIMITED 发明人 KASAYA SUSHI
分类号 G11C16/06;G11C7/02;G11C7/10;G11C7/14;(IPC1-7):G11C5/06 主分类号 G11C16/06
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