Control apparatus for testing a random access memory

摘要

A logic device includes a RAM and control apparatus (10). The control apparatus (10) is adapted to receive input signals (6) from a processor and the control apparatus (10) is also adapted to be coupled to the RAM to send signals to the RAM in response to the input signals (6). The control apparatus (10) includes a data generator (3) and the data generator generates a test bit pattern which is dependent on the received input signals (6).