发明名称 ARCHITECTURE FOR INTERMEDIATE FREQUENCY DECODER
摘要 <p>A decoder. The decoder includes interpolation circuitry that receives the digital signal and interpolates the digital signal to produce an interpolated digital signal. Additionally, the decoder includes a D/A converter that is coupled to the interpolation circuitry. The D/A converter receives the interpolated digital signal and converts such a signal to an analog signal. The decoder also includes an analog mixer coupled to the D/A converter. The analog mixer receives the analog signal and upconverts the analog signal.</p>
申请公布号 WO2001065680(A2) 申请公布日期 2001.09.07
申请号 US2001040238 申请日期 2001.03.02
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