| 摘要 |
A system and method for using scalable polynomials to translate a look-up up table delay model into a memory efficient model. The system of the present invention receives an input library of predefined cells having a number of predefined look-up tables for modeling timing arcs through circuit paths of the cells. Each look-up table is referenced by two input variables (e.g., input transition rate and output load capacitance) which correspond to an output delay time. The present invention analyzes each memory inefficient look-up table and selects a polynomial form (of two variables) for representing the timing data of the look-up table. The polynomial form is selected from scalable polynomial systems (e.g., the decomposed Taylor Series and the Joint Taylor Series). The polynomial forms that are selected can have different orders (e.g., first, second, third, etc.) for the input variables. For a particular selected polynomial form, the present invention performs a linear least square error (LSE) curve fitting analysis thereon to determine the proper set of coefficients for the polynomial form. The selected polynomial with coefficient values is then accepted or rejected based on a Chi-Square analysis that is performed on the selected polynomial to avoid over-fitting. If accepted, the memory efficient polynomial replaces the look-up table. If rejected, a next polynomial form is selected and processing is re-done. If no acceptable polynomial form can be found, the look-up table is not replaced.
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