发明名称 |
DRAIN-EXPANDED TRANSISTOR FOR INTEGRATED CIRCUIT |
摘要 |
PROBLEM TO BE SOLVED: To provide a drain-expanded transistor for an integrated circuit for a submicron CMOS process. SOLUTION: A transistor gate 40 is made to cover a CMOS n-type well region 80 and a CMOS p-type well region 70 within a silicon substrate 10. Transistor source regions 50 and 140 and drain regions 55 and 145 are made within each kind of CMOS well regions, thus making a drain-expanded transistor. Here, the CMOS well regions 70 and 80 function as the drain-expanded regions of the transistor.
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申请公布号 |
JP2001168210(A) |
申请公布日期 |
2001.06.22 |
申请号 |
JP20000328380 |
申请日期 |
2000.10.27 |
申请人 |
TEXAS INSTR INC <TI> |
发明人 |
MORTON ALEC;TAYLOR EPHLAND;CHIN-YU TSUAI;JOSEPH C MITOROSU;DAN M MOSHAA;SAM SHICHIJOO;KEITH KOONS |
分类号 |
H01L29/78;H01L21/336;H01L21/8238;H01L27/092;H01L29/06;(IPC1-7):H01L21/823 |
主分类号 |
H01L29/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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