| 摘要 |
The whole of a semiconductor integrated circuit operating in synchronism with a clock signal, is divided into a plurality of circuit blocks in units of a function, and different clock signals are supplied to the circuit blocks, respectively. Each of the circuit blocks is so constructed as to minimize the clock skew, by taking into consideration the size of clock buffers and the balance in load of the clock buffers. A data signal between two circuit blocks of the circuit blocks is transferred through a queue which is controlled to fetch the data in response to the clock signal supplied to the circuit block at the input side of the queue and to output the fetched data in response to the clock signal supplied to the circuit block at the output side of the queue.
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