| 摘要 |
PROBLEM TO BE SOLVED: To provide a configuration of an arithmetic unit capable of effectively utilizing the resources of the arithmetic unit corresponding to the valid data width of input data. SOLUTION: An arithmetic unit 100 is provided with a division circuit 10 for receiving the first input data of M-bit (M: natural number) binary data and dividing these data into high-order (M-N) bits (N: natural number < M) and low-order N bits, an arithmetic unit 20 for executing arithmetic processing of N bits between second N-bit data and the low-order bits of the first input data, an arithmetic correction circuit 30 for incrementing/decrementing the high-order bits of the first input data when the overflow of digits occurs in the arithmetic unit 20, and an output data setting circuit 40 for receiving the outputs of the arithmetic unit 20 and the arithmetic correction circuit 30 and outputting the arithmetic result of M bits. |
