发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND LAYOUT METHOD THEREOF
摘要 PROBLEM TO BE SOLVED: To insert a large amount of capacitive cells, and to automatically recover a timing deviation without changing the size of a standard cell in a semiconductor integrated circuit device. SOLUTION: In a semiconductor integrated circuit device, capacitive cells capable of being changed into repair cells by altering contacts 101 or the like are arranged in a region, in which there is none, and the capacitive cells are changed into the repair cells and used when the repair cells are required similarly. The capacitive cells capable of being varied into repeater cells by altering the contacts are arranged in a blanking region adjacent to a long-distance wiring, and the capacitive cells are changed into the repeater cells and used when a timing deviation is generated in the long-distance wiring.
申请公布号 JP2001024159(A) 申请公布日期 2001.01.26
申请号 JP19990197562 申请日期 1999.07.12
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SUGIMOTO YUICHIRO
分类号 H01L21/822;H01L21/8238;H01L27/04;H01L27/092;(IPC1-7):H01L27/04;H01L21/823 主分类号 H01L21/822
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