发明名称 DATA TRANSFER SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide a data transfer system which is suitably applied to a device for function performance evaluation and transfers a set amount of parallel data successively and repeatedly after a synchronizing signal. SOLUTION: The system comprises a system-bus side device 1 and a local-bus side device 2. To successively and repeatedly transfer a set amount of parallel data after the synchronizing signal, the local-bus side device 2 is equipped with an address decoding control circuit 23 where transfer data width L, the number (m) of synchronizing data, the number (n) of transfer data, and the repetition frequency (x) of the transfer data are set from the system-bus side device 1 and a memory 24 stored with the synchronizing data and transfer data. An address decoding circuit 25 reads data out of the memory 24 according to the data set in the address decoding control circuit 23 and transfers the data.
申请公布号 JP2001005742(A) 申请公布日期 2001.01.12
申请号 JP19990171244 申请日期 1999.06.17
申请人 HITACHI LTD;HITACHI ADVANCED SYST:KK 发明人 MAKINO TOSHIHIKO;SATO TOSHIKI;OONO TADAYUKI
分类号 G06F11/22;G06F13/00;H04L12/40 主分类号 G06F11/22
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