发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PROBLEM TO BE SOLVED: To avoid a cost increase only by SRAMs or an increase in power consumption only by DRAMs to an increase of a memory capacity by mixedly mounting SRAMs and DRAMs on the same chip and allotting different addresses to the SRAMs and DRAMs respectively. SOLUTION: A core part 1 has an SRAM bank 2-0 and DRAM banks 2-1 to 2-3. Addresses A1 and A0 are allotted to the banks 2-0 to 2-3, e.g. addresses A1 and A0 of the SRAM bank 2 are made [0, 0], and addresses A1 and A0 of the DRAM banks 2-1 to 2-3 are made [0, 1] to [1, 1]. A decoder 7 decodes address signals A1 and A0, and outputs decode signals A00-A11. The SRAM bank 2-0 can be selected by setting A00='H', DRAM bank 2-1 can be selected by setting A01='H', and DRAM banks 2-2 and 2-3 can be selected similarly.
申请公布号 JP2000339954(A) 申请公布日期 2000.12.08
申请号 JP19990150792 申请日期 1999.05.31
申请人 FUJITSU LTD 发明人 IKEDA HITOSHI;FUNYU AKIHIRO;FUJIOKA SHINYA;SUZUKI TAKAAKI;TAGUCHI MASAO;SATO KIMIAKI;SATO MITSUNORI
分类号 G11C11/41;G11C11/00;G11C11/401;G11C11/407;G11C11/413 主分类号 G11C11/41
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