发明名称 Dynamic random access memory circuit having a testing system and method to determine the sensitivity of a sense amplifier
摘要 A dynamic random access memory (DRAM) circuit is provided that utilizes a testing system and method to determine the sensitivity of a sense amplifier. More specifically, the DRAM circuit, in determining the sensitivity of the sense amplifier, utilizes a testing system to independently control the magnitude of a voltage differential appearing between a pair of bit lines and sensed by the sense amplifier. The sensitivity of the sense amplifier is then able to be determined by monitoring an input/output signal in response to sensing the known voltage differential. The testing system controls the magnitude of the voltage differential appearing between the bit lines by enabling a first dummy cell to transfer a first reference charge onto a first bit line and by enabling a second dummy cell to transfer a second reference charge onto a second bit line.
申请公布号 EP1045397(A3) 申请公布日期 2000.12.06
申请号 EP20000302532 申请日期 2000.03.28
申请人 STMICROELECTRONICS, INC. 发明人 BRADY, JAMES
分类号 G01R31/28;G11C11/401;G11C29/02;G11C29/12;G11C29/50 主分类号 G01R31/28
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