BIAS COMPENSATION CIRCUIT

摘要

PURPOSE: A circuit for compensating a bias is provided maintain voltage ratio applied to a main system by minimizing the variation of current due to the fluctuation of a voltage source. CONSTITUTION: A first register is connected to a voltage source(Vdd) to maintain an adequate voltage. An NMOS transistor is connected to a first node. The drain of the NMOS transistor is coupled to the first resistor and the source thereof is connected to a main system. A bias is applied to the gate of the NMOS transistor. A second resistor is connected to the voltage source(Vdd) to maintain an adequate voltage. A PMOS transistor is coupled to the first node. The source of the PMOS transistor is connected to the second resistor and the drain thereof is coupled to the main system. As to the gate of the NMOS transistor, the bias is applied to the gate of the PMOS transistor.