Method and circuit for minimizing glitches in phase locked loops

摘要

An input terminal (EXT) is connected to an input of a phase detector (8). A charge pump generator (9), filter (10) and voltage controlled oscillator (11) are connected downstream. A frequency divider (12) feedback is connected between an output of the oscillator and the second input of the detector. A compensation circuit (13), including a storage element controlled by a generator signal, is connected between the generator and the filter absorbing some of the charge. An independent claim is included for a method for minimising the generation of glitches in phase locked loops.