| 摘要 |
PROBLEM TO BE SOLVED: To realize a signal delay circuit which is capable of coping with the diversification of video sources and the high resolution of videos and which performs the phase adjustment of an input video signal and plural horizontal clock signals. SOLUTION: A delay circuit 3 which has delay cells 6a, 8a, 9a delaying a signal and signal selector circuits 7a1, 7a2, 7a3 and which changes a delay time by inputting output signals E2, E4, E6 from the delay cells 6a, 8a, 9a, an input horizontal clock signal E1 from a timing signal generator 1 and output horizontal clock signals E3, E5 of respective signal selector circuits respectively to the signal selector circuits 7a1, 7a2, 7a3 and by making input signals of the signal selector circuits of respective stages to be selected by signal selector control signals H, J, K from a signal selector control signal generator 12 is formed and optimum horizontal output signals with respect to the video signal L of a matrix type video display device 11 are formed by combining plural stages of the delay circuit in parallel.
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