发明名称 Reduction of silicon oxynitride film delamination in integrated circuit inter-level dielectrics
摘要 Outgassing from a dielectric gap fill layer, e.g., a low dielectric constant material such as HSQ, and attendant deformation or delamination of a barrier dielectric layer on an overlying patterned conductive layer during subsequent thermal processing are avoided or significantly reduced by controlling the thickness of the dielectric cap layer on the dielectric gap fill layer. Embodiments include depositing a conformal SiON barrier on a first conductive pattern, depositing a HSQ gap fill layer on the conformal SiON barrier layer, depositing a silicon oxide cap layer and planarizing such that the thickness of the planarized silicon cap layer is at least 2500 ANGSTROM , thereby avoiding deformation and/or delamination of a conformal SiON barrier layer on an overlying patterned conductive layer during subsequent thermal processing.
申请公布号 US6133619(A) 申请公布日期 2000.10.17
申请号 US19980144521 申请日期 1998.08.31
申请人 ADVANCED MICRO DEVICES, INC. 发明人 SAHOTA, KASHMIR;HUANG, RICHARD J.;MATSUMOTO, DAVID;RAMSBEY, MARK T.;SUN, YU;RIZZUTO, JUDITH QUAN
分类号 H01L21/312;H01L21/314;H01L21/768;(IPC1-7):H01L51/00 主分类号 H01L21/312
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