发明名称 DATA MANAGING METHOD FOR ASYNCHRONOUS I/O CACHE MEMORY
摘要 PROBLEM TO BE SOLVED: To provide an improved method for managing a cache memory by transmitting data from the cache memory to a request side device and canceling data from the cache memory immediately after data is communicated. SOLUTION: A cache memory 126 has a memory manager 402, a memory space 404 and a directory/index 306. The memory manager 402 is constituted of an integrated circuit 410 which is specially constituted to execute all functions. The identification 412 of transfer (or fetch), the cancel 414 of cache data for using the space, the reading 416 of data to the cache, the writing 418 of data to an I/O bus (PCI bus, for example) and the cancel 420 of data from the cache can be contained in the functions, Thus, the memory manager 402 cancels data when the last byte of a data line is outputted to a PCI bus 130.
申请公布号 JP2000227878(A) 申请公布日期 2000.08.15
申请号 JP20000003341 申请日期 2000.01.12
申请人 HEWLETT PACKARD CO <HP> 发明人 THOMAS V SPENCER;ROBERT J HONING
分类号 G06F12/08;G06F12/12;(IPC1-7):G06F12/08 主分类号 G06F12/08
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