| 摘要 |
PROBLEM TO BE SOLVED: To decrease the power for a digital radio system. SOLUTION: A register 400 of this device outputs, as a parallel M-sequence generator, the same bit stream as a serial M-sequence generator provided with the same chip length. In this case, in parallel N-bit constitution, the first N bits of a sequence are read to output, remaining bits are shifted and new N bits are generated all in one clock cycle. The effect of obtaining the n bits in the output is the multiplication of the companion matrix of an N order by the present contents of a shift register. Linear combination elements (exclusive OR gates for instance) XOR0-XOR7 are selectively positioned so as to combine the contents of the various delay elements of a parallel structure, the result is fed back to the other delay elements and the same output as a serial structure is generated. |
