发明名称 METHOD FOR FORMING SHALLOW TRENCH ISOLATION OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for forming a shallow trench isolation of a semiconductor device is provided which can suppress the over-polishing phenomenon or the phenomenon that a trench-burying oxide is remained during a planarization process. CONSTITUTION: A method for forming a shallow trench isolation suppresses the over-polishing and the remaining of a trench-burying oxide(25) during a planarization process, by performing the planarization process after removing the trench-burying oxide on a top of a wide active region using a reverse mask(26). The method includes the steps of: defining a number of wide and narrow active regions and field regions, and forming an etching resistant pattern(22,23) on a semiconductor substrate(21); forming a number of wide and narrow trenches by etching the semiconductor substrate with an etching process using the etching resistant pattern; forming the trench-burying oxide on a top of the whole structure including the trenches; forming a trench-burying oxide pattern on the active region, by removing a part of the trench-burying oxide on the wide active region; and removing the etching resistant pattern, after remaining the trench-burying oxide in the trench by polishing the trench-burying oxide.
申请公布号 KR20000044880(A) 申请公布日期 2000.07.15
申请号 KR19980061383 申请日期 1998.12.30
申请人 HYUNDAI ELECTRONICS IND. CO., LTD. 发明人 YEU, IN SUCK
分类号 H01L21/76;(IPC1-7):H01L21/76 主分类号 H01L21/76
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