发明名称 DATA OUTPUT BUFFER CIRCUIT
摘要 PURPOSE: A data output buffer circuit is provided which controls the threshold voltages of transistors according to input/output data to improve data output characteristic and blocks noise when a negative level data is input to perform a stable operation. CONSTITUTION: A data output buffer circuit is constructed in such a manner that an output signal of an inverter(IN11) to which an input signal(V1) is applied is supplied to the gate of a pull-up transistor(N1) and the drain of a clamp transistor(N3) whose gate is grounded, an output signal of an inverter(IN12) to which an input signal(V2) is applied is supplied to the gate of a pull-down transistor(N2), the sources of the pull-up transistor and the clamp transistor and the drain of the pull-down transistor are connected in common to generate an output signal(DQ) at the connection node, to thereby output data by pull-up and pull-down operations according to the input signals. The circuit further has a threshold voltage controller. The threshold voltage controller decreases the threshold voltages of the pull-up and pull-down transistors but increases the threshold voltage of the clamp transistor is increased when data is output using a read signal(RD) as an input signal. In addition, the threshold voltage controller increases the threshold voltages of the pull-up and pull-down transistors but decreases the threshold voltage of the clamp transistor is increased when data is input.
申请公布号 KR100258853(B1) 申请公布日期 2000.06.15
申请号 KR19960077486 申请日期 1996.12.30
申请人 HYUNDAI MICRO ELECTRONICS CO., LTD. 发明人 KIM, DONG-GYUN
分类号 H03K19/094;(IPC1-7):H03K19/094 主分类号 H03K19/094
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