发明名称 Phase lock loop enabling smooth loop bandwidth switching
摘要 The present invention, generally speaking, provides a PLL that enables smooth switching of loop bandwidth without changing the loop filter. In accordance with one aspect of the invention, the loop bandwidth of a phase lock loop including an output frequency divider and a reference frequency divider is changed by changing a divisor of the output frequency divider by a factor and changing a divisor of the reference frequency divider by substantially the same factor. If the factor is greater than one, the loop bandwidth is decreased. If the factor is less than one, then the loop bandwidth is increased. In accordance with another aspect of the invention, a phase lock loop includes an oscillator having a control input, a phase comparator, a loop filter, and a feedback path including an output frequency divider. A reference frequency divider is also provided. A controller is coupled to the output frequency divider and to the reference frequency divider for changing a divisor of each at substantially the same time in response to a bandwidth select signal. The controller changes the divisors by substantially the same factor, changing the loop bandwidth without affecting the output frequency of the phase lock loop.
申请公布号 AU1125000(A) 申请公布日期 2000.06.13
申请号 AU20000011250 申请日期 1999.10.21
申请人 TROPIAN, INC. 发明人 BRIAN SANDER
分类号 H03L7/197 主分类号 H03L7/197
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