发明名称 |
Synchronous semiconductor memory device having redundant circuit of high repair efficiency and allowing high speed access |
摘要 |
A redundant memory cell column region provided corresponding to respective regular memory cell column regions can have data read and written through a sub I/O line pair and a main I/O line pair independent to those of the regular memory cell column region. Also, one redundant memory cell column region can be connected to a corresponding global I/O line pair G-I/O of any of the regular memory cell column regions via a multiplexer to be replaceable of any of two regular memory cell column regions.
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申请公布号 |
US6067260(A) |
申请公布日期 |
2000.05.23 |
申请号 |
US19980195194 |
申请日期 |
1998.11.18 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
OOISHI, TSUKASA;TOMISHIMA, SHIGEKI;SHIMANO, HIROKI |
分类号 |
G11C11/407;G11C11/401;G11C11/409;G11C29/00;G11C29/04;(IPC1-7):G11C7/00;G11C8/00 |
主分类号 |
G11C11/407 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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