发明名称 METHOD FOR LAMINATING PREPREG SHEET AND METHOD FOR MANUFACTURING MULTILAYER SUBSTRATE USING THE SAME
摘要 PROBLEM TO BE SOLVED: To provide a high quality inner via-hole improving its registering and damaging no electrical characteristic of the inner via-hole of a circuit substrate used for various electronic equipment. SOLUTION: An aramid-epoxy sheet 1 is put and heated in a batch dryer (a vacuum-dryer is also acceptable) at 70 deg.C for 30 minutes with its moisture removed and internal stress relaxed before PET sheets 2a and 2b are bonded on its both side. After naturally cooled to the room temperature, it is taken out from the dryer and the PET sheets 2a and 2b are bonded on the both side of the aramid-epoxy sheet 1. This enables to suppress dimensional variation and unevenness of the aramid-epoxy sheet 1.
申请公布号 JP2000101250(A) 申请公布日期 2000.04.07
申请号 JP19980266199 申请日期 1998.09.21
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KISHIMOTO KUNIO;TAKENAKA TOSHIAKI;NAKAMURA SHINJI;NOZAWA DAISUKE
分类号 H05K3/28;B29B11/16;B29K105/06;B32B27/34;C08J5/24;H05K3/46;(IPC1-7):H05K3/46 主分类号 H05K3/28
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