MULTI-LEVEL INTERCONNECT STRUCTURE OF INTEGRATED CIRCUIT FORMED BY SINGLE VIA ETCH AND DUAL FILL PROCESS

摘要

PURPOSE: A method of fabricating semiconductor is to improve process for forming a multi-level interconnect structure, the improved process being used to produce a set of conductors within a single elevational level and being used to connect a select number of those conductors to an underlying contact area by using a single via etch step followed by either a single or dual fill step. CONSTITUTION: A contact structure which links conductors on one level to an underlying level is formed by a single via etch step followed by a fill step separate from a fill step used in filling the via. The via is filled with a conductive material which forms a plug separate from the material used in forming the interconnect. The step used in filling the via is the same as that used in forming the interconnect. In either instance, a via is formed through a first dielectric to underlying conductors. A second dielectric is patterned upon the first dielectric and serves to laterally bound the fill material used in producing the overlying interconnect. Regardless of the process sequence chosen, the interlevel dielectric structure is left substantially planar in readiness for subsequent interconnect levels dielectically deposited thereon.