| 摘要 |
PROBLEM TO BE SOLVED: To provide an information processor for reducing the activation of a system bus cycle from an input/output device connected to an extension input/ output bus and improving system performance in the information processor provided with the hierarchized bus structure of the input/output bus and the extension input/output bus further under a system bus for connecting a central processing unit and a main memory unit. SOLUTION: A bus extension device 50 is provided with a cache part 52 for storing and holding the copy of a part of the data of the main memory unit 20 and a cache control part 51 for managing the data held in the cache part 52. For an access request to the main memory unit 20 from the input/output device connected to the extension input/output bus, by supplying the data held in the cache part 52 of the bus extension device 50 to the input/output device, the need of the activation of the bus cycle of the system bus by the access to the main memory unit 20 from the input/output device is eliminated.
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