| 摘要 |
A nonvolatile semiconductor memory device has a block of memory cells. The memory cells are arranged in rows and columns, forming a matrix. Each of the memory cells preferably includes a floating gate type transistor. A column of dummy cell transistors is located adjacent to the memory cell block. A selection circuit is connected to the memory cell block and the column of dummy cell transistors for selecting one of the memory cell transistors and one of the dummy cell transistors. A write circuit applies a first potential corresponding to write data to the selected memory cell and a second potential corresponding to the first potential inverted to the selected dummy cell transistor.
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