发明名称
摘要 <p>An unpredictable microprocessor or microcomputer comprises a processor ( 1 ), a first working memory ( 51 ), a main memory ( 6 ) containing an operating system, a main program (P 1 ) and a secondary program (P 2 ), a second working memory ( 52 ), and switching means which, during the performance of the programs, makes it possible to switch from using one of the two working memories ( 51, 52 ) to using the other working memory, while preserving their contents. Switching means comprise at least one first block of registers ( 54 ) for storing the operating context of the programs in the main memory and a switching circuit ( 53 ) for enabling one of the working memories and the access registers (A 1 -a 3 ) (d 1 -d 3 ) associated with each memory ( 51, 52, 6 ) and controlled by said switching circuit ( 53 ).</p>
申请公布号 JP2000501541(A) 申请公布日期 2000.02.08
申请号 JP19990505328 申请日期 1998.06.25
申请人 发明人
分类号 G06F11/22;G06F1/00;G06F9/46;G06F9/48;G06F12/14;G06F15/78;G06F21/55;G06F21/57;(IPC1-7):G06F9/46 主分类号 G06F11/22
代理机构 代理人
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