METHOD FOR GENERATING SIMULATION TEST BENCH AND DEVICE THEREFOR

摘要

PROBLEM TO BE SOLVED: To make generatable a simulation test bench capable of compression test pattern files of plural input signal lines into one test pattern file thereby reducing the occupied quantity of the test pattern file in a recording medium. SOLUTION: In the case of generating the simulation test bench of a digital LSI circuit with plural input signal lines, test patterns are generated for every input signal line (a step 10), the test patterns with the same input timing are connected by bit connection for at least two or more input lines and the test pattern file to which the data compression is performed is generated (a step 11). And the simulation test bench to be inputted in the corresponding input signal line is generated by reading the test pattern file and performing bit distribution (a step 12).