| 摘要 |
PURPOSE: A device to generate a random bit for a serial bus interface with a high speed is provided to minimize a probability of the random bit generation, when a condenser phenomena is generated between the two nodes. CONSTITUTION: A device to generate a random bit for a serial digital interface with a high speed, comprises: a flip-flop of K(bigger than 0) number; a counter for increasing the counting value by answering for a predetermined clock signal, and outputting the result as parallel data of a K bit; a T flip-flop for converting the output state by answering the clock signal; a logic adding operator for applying the output of the T flip-flop to a first input, and logically adding the applied predetermined data with the first input to a second input; a logic multiplier for logically multiplying the output of the logic adding operator and the clock signal, and outputting the result; a shift register for having a flip-flop of N(bigger than 0) number, shifting the output of the flip-flop of the N number by answering for the logic multiplier, and outputting the result as parallel data of the N bit; a multiplexer for applying the output of the counter as a select signal, applying the parallel data of the N bit as input data, and outputting one bit of the N bit parallel data as a random bit by answering for the select signal.
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