| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide the digital delay circuit which suppresses increases in circuit scale and power consumption in proportional to an increase in additional delay quantity (time) even in such a case. SOLUTION: A change point detecting circuit 3 detects a change point of input data and according to change point information detected by the detecting circuit 3, input data at a data input terminal 1 are written to a 2-port RAM 7. The stored data of the 2-port RAM 7 are read out by delaying the change point information from the change point detecting circuit 3 by a specific time through a delay circuit 4 to obtain delayed output data from a data output terminal 2.</p> |
