发明名称 |
Negative voltage switch architecture for a nonvolatile memory |
摘要 |
A negative voltage switching circuit in a nonvolatile memory includes a switching transistor coupled to an output of the negative voltage switching circuit and a first voltage source that has a voltage level substantially lower than zero volts. A pull-up circuit is coupled to a control terminal of the switching transistor and selectively to a second voltage source having a voltage level substantially above zero volts. The pull-up circuit applies the second voltage source to the control terminal of the switching transistor when the pull-up circuit is coupled to the second voltage source such that the switching transistor does not couple the first voltage source to the output. A pull-down circuit is coupled to the first voltage source and the control terminal of the switching transistor. The pull-down circuit applies the first voltage source to the control terminal of the switching transistor when the pull-up circuit is not coupled to the second voltage source such that the switching transistor couples the first voltage source to the output.
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申请公布号 |
US5978263(A) |
申请公布日期 |
1999.11.02 |
申请号 |
US19970895613 |
申请日期 |
1997.07.18 |
申请人 |
INTEL CORPORATION |
发明人 |
JAVANIFARD, JAHANSHIR J.;EVERTT, JEFFREY J. |
分类号 |
G11C16/16;G11C16/30;(IPC1-7):G11C11/34 |
主分类号 |
G11C16/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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