发明名称 |
Single-chip microcomputer which can generate error correction code or ECC data internally can reduce user's working load and required memory capacity without increasing ECC data write time |
摘要 |
The microcomputer has an electrically erasable memory (8) for temporary storage of externally delivered user data and ECC data corresponding to the user data , a program memory (5) and a CPU (2) for reading the program from the program memory to generate the ECC data based on the externally delivered user data and for sequential correction of errors contained in the externally supplied data using the generated ECC data.
|
申请公布号 |
DE19916120(A1) |
申请公布日期 |
1999.10.28 |
申请号 |
DE1999116120 |
申请日期 |
1999.04.09 |
申请人 |
NEC CORP., TOKIO/TOKYO |
发明人 |
FUKUSHIMA, KIYOSHI |
分类号 |
G06F11/10;G06F12/16;G06F15/78;(IPC1-7):G06F11/00;G11C16/02 |
主分类号 |
G06F11/10 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|